@mchp-mcc/scf-avr8-usart-v4 v1.0.1
Universal Synchronous and Asynchronous Receiver and Transmitter (USART)
Overview
The Universal Synchronous and Asynchronous serial Receiver and Transmitter (USART) is a fast and flexible serial communication peripheral. The USART supports a number of different modes of operation that can accommodate multiple types of applications and communication devices. For example, the One-Wire Half-Duplex mode is useful when low pin count applications are desired. The communication is frame-based, and the frame format can be customized to support a wide range of standards.
The USART is buffered in both directions, enabling continued data transmission without any delay between frames. Separate interrupts for receive and transmit completion allow fully interrupt-driven communication. The transmitter consists of a single-write buffer, a Shift register, and control logic for different frame formats. The receiver consists of a two-level receive buffer and a Shift register. The status information of the received data is available for error checking. Data and clock recovery units ensure robust synchronization and noise filtering during asynchronous data reception.
Changelog
All notable changes to this project will be documented in this file.
1.0.1 - 2025-02-26
Bug Fixes
- M8PD-10895 :- Moved the Tx Complete Interrupt handler from the Data Register Empty (DRE) ISR to the Transmit Complete (TXC) ISR
- M8PD-10382 :- Fix the Error Get API to read the error status of the top unread character in the receive FIFO
New Features and Improvements
- M8PD-7299 :- Added MISRA C compliance
- M8PD-2345 :- Increasing the Tx/Rx software buffer size based on the available SRAM