0.2.0 • Published 2 years ago

gateware-ts v0.2.0

Weekly downloads
8
License
MIT
Repository
github
Last release
2 years ago

gateware-ts

gateware-ts is a hardware definition library written in TypeScript for generating Verilog code, ready to be piped into the open source FPGA toolchain.

The project aims to:

  • Create a type-safe and modular way of specifying RTL hardware
  • Integrate and facilitate the use of the open source FPGA toolchains
  • Be approachable and usable by JavaScript and TypeScript developers

Examples

A few illustrative examples can be found in the examples directory (more to come in the future).

Project Status

This project is very much a work in progress, and as such is likely to contain many bugs and rough edges. If you're looking for a production ready embedded HDL, the nMigen is definitely a better bet! But if you're looking to learn and hack on FPGAs in a type safe language, give this project a go.

0.4.0-beta.1

2 years ago

0.3.0-beta.0

2 years ago

0.3.0-beta.1

2 years ago

0.1.0

3 years ago

0.2.0

3 years ago

0.0.4

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0.0.3

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0.0.2

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0.0.1

3 years ago