kaneoh-ase-wip v0.0.11

ASE WIP

Structure

Device
  |- RFQ
  |- Design
  |- Engineering
  |- Manufacturing
      |- Lot
          |- BUM
          |- WS
          |- ASSY
              |- Sublot
          |- FT
              |- Sublot

• Product: Device
• Task: Manufacturing, ...
• Lot: Lot number
• Stage: Bumping, Wafer Testing, Assembly/Packing, Final Test
• Sublot: Sublots in Assembly/Packing, Final Test

Documents

• https://paper.dropbox.com/doc/ASE-WIP-SpecasSummary-nGC3Nrptj9zgml1zQ3cIh